IPC Training - Texas Instruments

IPC Training - Texas Instruments

IPC TRAINING Processor Communication Link 11/13/2014 Version 2.21 This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License. IPC 3.30 Agenda Overview IPC Modules Configuration Scalability Optimization Footnotes IPC 3.30 2 Overview

Inter-Processor Communication (IPC) Communication between processors Synchronization between processors Two modes Peer-to-peer All cores running TI-RTOS Master-slave Master core running HLOS (e.g. Linux, QNX, Android) Slave cores running TI-RTOS IPC 3.30 3 Overview Rich device support Homogeneous devices C6472, C6678, ... Heterogeneous devices OMAP5, DRA7XX, TCI6638K2X, OMAP-L138, F28M35, ...

IPC 3.30 4 Overview Flexible design supports many use cases Many thread combinations (Task, Swi, Hwi) Two types of messaging: notification, message queuing Multi- or uni-processor environments Hardware abstraction Device-specific support for hardware spinlocks, inter-processor mailbox IPC APIs are same across devices (e.g. GateMP implemented with hardware spinlock or software Peterson algorithm as needed) OS-agnostic Same APIs on all operating systems IPC 3.30 5 Overview - Architecture

Application Application IPC IPC SYS/BIOS SYS/BIOS Hardware IPC 3.30 6 Overview Top-level modules, used by application ti.sdo.ipc ti.sdo.utils Ipc

Ipc Notify Notify MultiProc MultiProc MessageQ MessageQ SharedRegion SharedRegion NameServer NameServer HeapMemMP HeapMemMP HeapBufMP HeapBufMP

GateMP GateMP IPC 3.30 7 Overview create/open Create/open model used to share instances of IPC modules Shared objects are created by the owner and opened by the user(s) Some objects may be opened multiple times (e.g. MessageQ, GateMP). Objects must have system-wide unique names Delete/close methods are used to finalize objects Owner should not delete until all users have closed

IPC 3.30 8 Overview Cache Management Cache coherency operations are performed by the module when shared state is accessed/modified Shared data is padded to prevent sharing cache line with other data Data Protection Shared data is protected by a multi-processor gate when accessed/modified IPC 3.30 9 Agenda Overview

IPC MODULES Lab 1 ex01_hello Configuration Scalability Optimization Footnotes IPC 3.30 10 IPC Modules Ipc IPC Manager MessageQ send and receive messages NameServer distributed name/value database Notify send and receive event notifications MultiProc processor identification SharedRegion shared memory address translation GateMP protect a critical section HeapMemMP, HeapBufMP multi-processor memory allocator

IPC 3.30 11 Ipc Module Ipc IPC Manager Used to initialize IPC and synchronize with other processors. Application must call Ipc_start and Ipc_attach. Two startup protocols Ipc.ProcSync_ALL - all processors start at same time Ipc.ProcSync_PAIR host processor starts first Configuration Ipc.procSync configures startup protocol When using Ipc.ProcSync_ALL, Ipc_attach is called internally from Ipc_start. Application does not call Ipc_attach. IPC 3.30 12

Ipc Module Ipc.ProcSync_ALL app.cfg var Ipc = xdc.useModule('ti.sdo.ipc.Ipc'); Ipc.procSync = Ipc.ProcSync_ALL; var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); MultiProc.setConfig(proc, ["HOST", "IPU1", "DSP1"]); SR_0 Reserved Header host is owner of SR_0 Flags HOST HOST Ipc_start() Ipc_start() Log_print("IPC

Log_print("IPC ready") ready") handshake completes Heap IPU1 IPU1 Ipc_start() Ipc_start() Log_print("IPC Log_print("IPC ready") ready") DSP1 DSP1 Ipc_start() Ipc_start() Log_print("IPC Log_print("IPC ready") ready")

IPC 3.30 13 IPC Module Ipc.ProcSync_PAIR var Ipc = xdc.useModule('ti.sdo.ipc.Ipc'); Ipc.procSync = Ipc.ProcSync_PAIR; HOST handshake completes SR_0 host is owner of SR_0 Ipc_start() do { status = Ipc_attach(IPU1) } while (status == Ipc_E_NOTREADY)

Log_print("IPC to IPU1 ready") do { status = Ipc_attach(DSP1) } while (status == Ipc_E_NOTREADY) Log_print("IPC to DSP1 ready") IPU1 Reserved Header Flags Heap Ipc_start() do { status = Ipc_attach(HOST) } while (status == Ipc_E_NOTREADY) Log_print("IPC to HOST ready") DSP1 Ipc_start() do { status = Ipc_attach(HOST)

} while (status == Ipc_E_NOTREADY) Log_print("IPC to HOST ready") IPC 3.30 14 Ipc Module Topology Topology expresses which processors communicate with IPC Transport created between two processors when they attach In previous example, HOST attached to IPU1 and DSP1. If IPU1 and DSP1 need to communicate with IPC, they must also attach to each other. Using Ipc.ProcSync_ALL creates transports between all processors. HOST transport DSP1 IPU1

IPU1 and DSP1 must attach to create their own transport IPC 3.30 15 Ipc Module Why have two modes? Because some applications are static and some are dynamic. Static System In a static system all processors are started at the same time. Once the processor is loaded, same application runs forever. IPC startup is part of device boot phase. This is typical for homogeneous devices. Base station, telecommunication, single purpose application. Dynamic System In a dynamic system, host processor boots first. Slave processors are booted later depending on application. Slave is shut down when application terminates. Slave reloaded many times, possibly with different executable. Consumer electronics, cell phone.

IPC 3.30 16 Ipc Module - API API Summary Ipc_start reserve memory, create default gate and heap Ipc_stop release all resources Ipc_attach setup transport between two processors Ipc_detach finalize transport IPC 3.30 17 Ipc Module - ROV ROV screen shot IPC 3.30 18

MessageQ MessageQ send and receive messages A message queue receives messages Single reader, multiple writers on same message queue Message queue instance created by reader, opened by writers IPU1 DSP1 reader writer cmdQ:MessageQ IPU2 msg msg writer msg

msg writer IPC 3.30 19 MessageQ transport Transport-independent API, works with local memory, shared memory, copy based transport (SRIO) Default transport offers zero-copy transfers via shared memory IPU1 IPU2 Application Application Application Application

MessageQ MessageQ MessageQ MessageQ Transport Transport Transport Transport IPC 3.30 20 MessageQ Message structure Every message contains an embedded message queue header followed by the payload. Application is responsible for the header allocation.

Message size must include header and payload sizes. Actual message size is typically padded MessageQ_MsgHeader Payload message size typedef struct { Bits32 reserved0; Bits32 reserved1; Bits32 msgSize; Bits16 flags; Bits16 msgId; Bits16 dstId; Bits16 dstProc; Bits16 replyId; Bits16 replyProc; Bits16 srcProc; Bits16 heapId; Bits16 seqNum;

Bits16 reserved; } MessageQ_MsgHeader /* /* /* /* /* /* /* /* /* /* /* /* /* reserved for List.elem->next reserved for List.elem->prev message size bitmask of different flags message id

destination queue id destination processor id reply id reply processor source processor heap id sequence number reserved */ */ */ */ */ */ */ */ */ */ */ */ */

typedef struct { MessageQ_MsgHeader reserved; char payload[50]; } App_Msg; IPC 3.30 21 MessageQ Message types MessageQ_MsgHeader is structure type definition. typedef struct { ... } MessageQ_MsgHeader; MessageQ_Msg is pointer to structure type definition. typedef MessageQ_MsgHeader *MessageQ_Msg; Message Allocation Message allocation must be large enough to hold the embedded

message queue header and your payload. See Message structure. IPC 3.30 22 MessageQ reader/writer IPU DSP Send a message from IPU to DSP (one-way message) Both processors register a heap with MessageQ module Receiving processor creates a message queue (DSP) Sending processor opens the message queue (IPU) Sending processor will... allocate a message write the payload send message Receiving processor will... get message read the payload free the message IPC 3.30

23 MessageQ reader/writer IPU DSP IPU DSP SharedRegion #0 Reserved Header MessageQ HeapId IHeap Handle 2 sr0: HeapMemMP MessageQ HeapId IHeap Handle

sr0: HeapMemMP 2 Writer sr0: HeapMemMP Reader DSP.workq: MessageQ MessageQ_alloc MessageQ_get msg msg MessageQ_put

msg MessageQ_free IPC 3.30 24 MessageQ reader/writer IPU (writer) #include #include #include #define HEAP_ID 2 #define MSG_SZ sizeof(MessageQ_MsgHeader) + 50 Ptr heap; MessageQ_Msg msg; MessageQ_QueueId qid; heap = SharedRegion_getHeap(0); MessageQ_registerHeap(HEAP_ID, heap); do { status = MessageQ_open("DSP1.workq", &qid); Task_sleep(1);

} while (status == MessageQ_E_NOTFOUND); while (running) { msg = MessageQ_alloc(HEAP_ID, SIZE) /* write payload */ MessageQ_put(qid, msg) } IPC 3.30 25 MessageQ reader/writer DSP (reader) #include #include #include #define HEAP_ID 2 Ptr heap; MessageQ_Handle que; MessageQ_Msg msg; heap = SharedRegion_getHeap(0); MessageQ_registerHeap(HEAP_ID, heap);

que = MessageQ_create("DSP1.workq", NULL); while (running) { MessageQ_get(que, &msg, MessageQ_FOREVER); /* read payload */ MessageQ_free(msg); } IPC 3.30 26 MessageQ client/server IPU DSP IPU Send a message from IPU to DSP and back again (round trip message) Both processors create a message queue IPU processor will... allocate a message write the payload send message wait for return message read payload free the message

DSP processor will... wait for message read the payload write new payload send message IPC 3.30 27 MessageQ client/server IPU DSP IPU IPU SharedRegion #0 DSP Reserved Header

MessageQ MessageQ sr0: HeapMemMP Client Memory_alloc Server msg MessageQ_staticMsgInit MessageQ_setReplyQueue DSP.workq: MessageQ msg MessageQ_get msg

MessageQ_put msg n: MessageQ MessageQ_getReplyQueue MessageQ_put MessageQ_get msg msg Memory_free IPC 3.30 28 MessageQ client/server IPU (client) #include #include

#include #include #include #define MSG_SZ sizeof(MessageQ_MsgHeader) + 50 IHeap_Handle heap; MessageQ_Handle ipuQ; MessageQ_Msg msg; MessageQ_QueueId dspQ; heap = (IHeap_Handle)SharedRegion_getHeap(0); ipuQ = MessageQ_create(NULL, NULL); do { status = MessageQ_open("DSP.workq", &dspQ); } while (status == MessageQ_E_NOTFOUND); msg = Memory_alloc(heap, SIZE, 0, NULL); MessageQ_staticMsgInit(msg, SIZE);

MessageQ_setReplyQueue(ipuQ, msg); /* write payload */ MessageQ_put(dspQ, msg); MessageQ_get(ipuQ, &msg, MessageQ_FOREVER); /* read payload */ Memory_free(heap, msg, SIZE); IPC 3.30 29 MessageQ client/server DSP (server) #include #include #include MessageQ_Handle dspQ; MessageQ_QueueId qid; MessageQ_Msg msg; dspQ = MessageQ_create("DSP.workq", NULL); while (running) { MessageQ_get(dspQ, &msg, MessageQ_FOREVER);

/* process payload */ qid = MessageQ_getReplyQueue(msg); MessageQ_put(qid, msg); } IPC 3.30 30 MessageQ MessageQ works with any SYS/BIOS threading model: Hwi: hardware interrrupts Swi: software interrupts Task: threads that can block and yield Variable size messages Timeouts are allowed when a Task receives messages Message Ownership Rules Acquire ownership with MessageQ_alloc, MessageQ_get Loose ownership with MessageQ_free, MessageQ_put Do not dereference a message when you dont have ownership IPC 3.30

31 MessageQ Uses an IHeap heap implementation to support MessageQ_alloc and MessageQ_free. Heaps are coordinated across processors by a common index which is registered using MessageQ_registerHeap API Heap ID is stored in message header IPC 3.30 32 MessageQ - API API Summary MessageQ_create create a new message queue MessageQ_open open an existing message queue MessageQ_alloc allocate a message from the pool

MessageQ_free return message to the pool MessageQ_put send a message MessageQ_get receive a message MessageQ_registerHeap register a heap with MessageQ IPC 3.30 33 MessageQ - ROV ROV screen shot IPC 3.30 34 Lab ex01_hello Please open the PowerPoint slide named IPC_Lab_1_Hello IPC 3.30

35 NameServer Module NameServer distributed name/value database Manages name/value pairs Used for registering data which can be looked up by other processors API Summary NameServer_create create a new database instance NameServer_add add a name/value entry into database NameServer_get retrieve value for given name IPC 3.30 36 NameServer IPU create NameServer instance DSP query IPU for name/value pair IPU

DSP Application Application NameServer_create NameServer_create NameServer_add NameServer_get email: NameServer JohnDoe email: NameServer [email protected] IPC 3.30

37 NameServer IPU create NameServer instance DSP query IPU for name/value pair IPU DSP #include #include #include #include #include NameServer_Handle ns; Char buf[32]; Int len; NameServer_Handle ns; Char buf[];

Int len; ns = NameServer_create("email", NULL); ns = NameServer_create("email", NULL); NameServer_get(ns, JohnDoe", buf, &len, NULL); strcpy(buf, [email protected]"); Int len = strlen(buf); NameServer_add(ns, JohnDoe", buf, len); IPC 3.30 38 NameServer Module ROV screen shot IPC 3.30 39 Notify Module Notify send and receive event notifications

Inter-processor notifications Multiplex 32 events using single interrupt line Some events are used by IPC Notification is point-to-point Callback functions Register for a specific procId + lineId + eventId triplet Callback can be reused (use procId and lineId to de-multiplex) Callbacks can be chained (all callbacks are invoked) Callback function receives procId, eventId, arg, payload API Summary Notify_sendEvent raise an event Notify_registerEvent register a callback for an event Notify_registerEventSingle register for exclusive use of event Notify_FnNotifyCbck callback function type definition IPC 3.30 40 Notify IPU DSP IPU sends a notification to the DSP

IPU processor will... Send a NOP event to test the connection (optional) Send periodic event to the DSP DSP processor will... Create a semaphore to synchronize between callback and task Register for event notification Notify callback will post the semaphore Task will run IPC 3.30 41 Notify IPU DSP IPU DSP n: Task Application

n: Semaphore Notify_sendEvent Semaphore_post notifyCB Application IPC IPC raise interrupt Mailbox ipc: Hwi CPU IPC 3.30

42 Notify IPU #include #include #include #define EVT 12 #define NOP 0 UInt16 dsp = MultiProc_getId("DSP"); UInt32 payload; do { s = Notify_sendEvent(dsp, 0, EVT, NOP, TRUE); if (s == Notify_E_EVTNOTREGISTERED) { Task_sleep(1); } } while (s == Notify_E_EVTNOTREGISTERED); do { /* work */ payload = ...; Notify_sendEvent(dsp, 0, EVT, payload, TRUE); } until(done);

IPC 3.30 43 Notify DSP #include #include #include #include #define EVT 12 #define NOP 0 UInt16 IPU = MultiProc_getId("IPU"); Semaphore_Handle sem;

sem = Semaphore_create(0, NULL, NULL); Notify_registerEvent(IPU, 0, EVT, notifyCB, (UArg)sem); do { Semaphore_pend(sem, BIOS_WAIT_FOREVER); /* work */ } until(done); Void notifyCB(UInt16 procId, UInt16 lineId, UInt32 eventId, UArg arg, UInt32 payload) { Semaphore_Handle sem = (Semaphore_Handle)arg; if (payload != NOP) { Semaphore_post(sem); } } IPC 3.30 44 Notify Module ROV screen shot

IPC 3.30 45 MultiProc Module MultiProc processor identification Stores processor ID of all processors in the multi-core application Stores processor name Processor ID is a number from 0 (n-1) Processor name is defined by IPC IPC Release Notes > Package Reference Guide > ti.sdo.utils.MultiProc > Configuration Settings > MultiProc.setConfig Click on Table of Valid Names for Each Device API Summary MultiProc_getSelf return your own processor ID MultiProc_getId return processor ID for given name MultiProc_getName return processor name IPC 3.30 46

SharedRegion Module SharedRegion shared memory address translation Manages shared memory and its cache configuration Manages shared memory using a memory allocator SRPtr is a portable pointer type Multiple shared regions are supported Each shared region has optional HeapMemMP instance Memory is allocated and freed using this HeapMemMP instance HeapMemMP_create/open and managed internally at IPC initialization SharedRegion_getHeap API to get this heap handle IPC 3.30 47 SharedRegion Module SharedRegion #0 is special Always contains a heap Contains global state that all cores need to access (reserved header)

Must be placed in memory that is accessible by all BIOS cores in the system API Summary SharedRegion_getHeap return the heap handle SharedRegion_getId return region ID for given address SharedRegion_getPtr translate SRPtr into local address SharedRegion_getSRPtr translate local address into SRPtr IPC 3.30 48 SharedRegion Module ROV screen shot IPC 3.30 49 SharedRegion Sometimes, shared memory has different address on

different processors. Use SharedRegion to translate addresses. IPU 0xA0000000 2: SharedRegion IPC 3.30 0x80000000 DSP 50 SharedRegion ipu.cfg var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); var sr2 = new SharedRegion.Entry( {

name: "SR_2", base: 0xA0000000, len: 0x400000, ownerProcId: 0, isValid: true, cacheEnable: false }; SharedRegion.setEntryMeta(2, sr2); dsp.cfg var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); var sr2 = new SharedRegion.Entry( { name: "SR_2", base:

0x80000000, len: 0x400000, ownerProcId: 0, isValid: true, cacheEnable: false }; SharedRegion.setEntryMeta(2, sr2); IPC 3.30 51 SharedRegion IPU DSP #include #include

#include #include Ptr ptr = 0xA0004000; SRPtr srptr = SharedRegion_getSRPtr(ptr, 2); /* Receive message, translate * embedded SRPtr into local pointer. */ MessageQ_get(q, &msg); /* Write SRPtr into message payload * and send message to DSP. */ msg->srptr = srptr; MessageQ_put(q, msg); SRPtr srptr = msg->srptr; Ptr ptr = SharedRegion_getPtr(srptr); /* ptr = 0x80004000 */

IPC 3.30 52 GateMP Module GateMP protect a critical section Multiple processor gate that provides context protection against threads on both local and remote processors API Summary GateMP_create create a new instance GateMP_open open an existing instance GateMP_enter acquire the gate GateMP_leave release the gate IPC 3.30 53 GateMP Use GateMP instance to protect buffer from concurrent access

IPU processor will... create a GateMP instance enter the gate modify shared memory leave the gate DSP processor will... open the GateMP instance enter the gate modify shared memory leave the gate IPC 3.30 54 GateMP IPU DSP Application

Application GateMP_create GateMP_open buf: GateMP GateMP_enter GateMP_enter 2: SharedRegion /* modify buffer */ buf /* modify buffer */ GateMP_leave GateMP_leave IPC 3.30

55 GateMP Module IPU DSP #include #include #include #include GateMP_Params params; GateMP_Handle gate; GateMP_Handle gate; GateMP_open("BufGate", &gate); GateMP_Params_init(¶ms); params.name = "BufGate";

params.localProtect = GateMP_LocalProtect_NONE; params.remoteProtect = GateMP_RemoteProtect_SYSTEM; GateMP_enter(gate); /* modify buffer */ GateMP_leave(gate); gate = GateMP_create(params); GateMP_enter(gate); /* modify buffer */ GateMP_leave(gate); IPC 3.30 56 HeapMemMP HeapBufMP Modules HeapMemMP, HeapBufMP multi-processor memory allocator Shared memory allocators that can be used by multiple processors HeapMemMP variable size allocations HeapBufMP fixed size allocations, deterministic, ideal for MessageQ

IPCs versions of HeapBuf, adds GateMP and cache coherency to the version provided by SYS/BIOS. All allocations are aligned on cache line size. Warning: Small allocations will occupy full cache line. Uses GateMP to protect shared state across cores. HeapBufMP. All buffers are same size (per instance) Every SharedRegion uses a HeapMemMP instance to manage the shared memory IPC 3.30 57 HeapMemMP HeapBufMP Modules API Summary HeapMemMP_create create a heap instance HeapMemMP_delete delete a heap instance HeapMemMP_open open a heap instance

HeapMemMP_close close a heap instance HeapMemMP_alloc allocate a block of memory HeapMemMP_free return a block of memory to the pool HeapBufMP_create create a heap instance HeapBufMP_delete delete a heap instance HeapBufMP_open open a heap instance HeapBufMP_close close a heap instance HeapBufMP_alloc allocate a block of memory HeapBufMP_free return a block of memory to the pool IPC 3.30 58 HeapMemMP Module ROV screen shot IPC 3.30 59 HeapMemMP

Create a heap and share it between IPU and DSP IPU processor will... Creates a heap instance Use Memory module to allocate memory DSP processor will... Open the heap instance Use Memory module to allocate memory IPC 3.30 60 HeapMemMP Module IPU SharedRegion DSP Application Application

HeapMemMP_create HeapMemMP_open Memory_alloc data: HeapMemMP IPC 3.30 Memory_alloc 61 HeapMemMP Module Casting the heap handle is one of the few places you need to call an IPC Package API. IPU #include #include

#include #include #include DSP #include #include #include #include #include

HeapMemMP_Params params; HeapMemMP_Params_init(¶ms); params.name = "DataHeap"; params.regionId = 0; params.sharedBufSize = 0x100000; HeapMemMP_Handle handle; HeapMemMP_open("DataHeap", &handle); HeapMemMP_Handle handle; handle = HeapMemMP_create(¶ms); ptr = Memory_alloc(heap, size, align, NULL); IHeap_Handle heap; heap = HeapMemMP_Handle_upCast(handle); IHeap_Handle heap; heap = HeapMemMP_Handle_upCast(handle); ptr = Memory_alloc(heap, size, align, NULL);

IPC 3.30 62 Agenda Overview IPC Modules CONFIGURATION Scalability Optimization Footnotes IPC 3.30 63 IPC Configuration The RTSC configuration phase is when components are integrated. Each component uses its configuration parameters to express its system requirement. The application configuration script is the starting point. It

defines which components are needed by the application and configures those components depending on its needs. Application will use MessageQ var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ'); MessageQ.maxNameLen = 48; /* default = 32 */ Application Application Create long message queue names MessageQ MessageQ app.cfg A rule of thumb: If you include the

header file in your C code, then you need to "use" the module in the configuration script. IPC 3.30 64 IPC Configuration documentation Navigate to the IPC product folder C:\Products\ipc_3_30_pp_bb Open the release notes ipc_3_30_pp_bb_release_notes.html Scroll down to the documentation section Click on Package Reference Guide (cdoc) Tip: the Package Reference Guide is also available in CCS Help. Tip: the Package Reference Guide is also available on-line.

Open 'all modules' section Click on a module (e.g. MessageQ) Click on Configuration settings link IPC 3.30 65 IPC Configuration documentation The documentation shows how to include the module in the application configuration script. Scroll down to the 'module-wide config parameters' for a list of all configuration parameters. IPC 3.30 66 IPC Configuration documentation When a config param has a default value, it will be indicated after the type.

If the config param does not have a default value, this is indicated by the keyword undefined. Sometimes default values are computed during the configuration phase. Scroll down to the 'module-wide functions' section. Sometimes you will need to use these to set a config param. IPC 3.30 67 IPC Configuration documentation Instance Configuration Parameters Some config params are specified when creating an instance. These are listed in the 'per-instance config parameters' section.

However, IPC modules only support instance creation at run-time. You will need to find the equivalent create parameter in the IPC API Reference Guide. Open the release notes ipc_3_30_pp_bb_release_notes.html Scroll down to the documentation section. Click on IPC Application Programming Interface (API) Reference Guide (HTML) Tip: the IPC API Reference Guide is also available in CCS Help. Tip: the IPC API Reference Guide is also available on-line. IPC 3.30 68 Ipc Module Configuration IPC configuration requires the following modules ti.sdo.ipc.Ipc ti.sdo.utils.MultiProc ti.sdo.ipc.SharedRegion Define Ipc startup protocol

Ipc.procSync controls attach behavior Ipc.ProcSync_ALL Attach to all processors simultaneously. Ipc.ProcSync_PAIR Attach to remote processor one-by-one. All processors must use the same startup protocol. var Ipc = xdc.useModule('ti.sdo.ipc.Ipc'); Ipc.procSync = Ipc.ProcSync_PAIR; IPC 3.30 69 Ipc Module Configuration SharedRegion #0 Memory Setup On some systems, the SR_0 memory may not be available at boot time. Host processor might map the memory into the slaves MMU. This configuration flag is used to block the slave until the memory is available. Ipc_start will spin until this flag is set true by host. Ipc.sr0MemorySetup = true; Ipc_start will access SR_0 memory immediately.

Ipc.sr0MemorySetup = false; Ipc_start will spin until host sets flag to true. Requires symbol address access from host. IPC 3.30 70 Ipc Module Configuration Attach and detach hooks You can register hook functions to be called during each attach and detach call. Use the hook function to perform application specific tasks. var Ipc = xdc.useModule('ti.sdo.ipc.Ipc'); var fxn = new Ipc.UserFxn; fxn.attach = '&userAttachFxn'; fxn.detach = '&userDetachFxn'; Ipc.addUserFxn(fxn, arg); The hook functions have the following type definitions.

Int (*attach)(UArg arg, UInt16 procId); Int (*detach)(UArg arg, UInt16 procId); IPC 3.30 71 MultiProc Configuration Define the processors in the IPC application. This example defines three processors: CORE0, CORE1, CORE2. Name order defines MultiProc ID (zero based counting number) CORE0 configuration var procNameAry = ["CORE0", "CORE1", "CORE2" ]; var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); MultiProc.setConfig("CORE0", procNameAry); CORE1 configuration var procNameAry = ["CORE0", "CORE1", "CORE2" ]; var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); MultiProc.setConfig("CORE1", procNameAry); CORE2 configuration

var procNameAry = ["CORE0", "CORE1", "CORE2" ]; var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); MultiProc.setConfig("CORE2", procNameAry); IPC 3.30 72 SharedRegion Configuration Define number of shared regions in the system. This config param must be the same across all processors in the system. Increasing the number of regions reduces the maximum size of each region. var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); SharedRegion.numEntries = 8; IPC 3.30 73 SharedRegion Configuration

Define number of shared regions in the system. This config param must be the same across all processors in the system. Increasing the number of regions reduces the maximum size of each region. var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); SharedRegion.numEntries = 8; Cache Line Size This value is used to align items on a cache line boundary. For example, memory allocations from the shared region heap will be aligned and sized on this boundary. It must be the same value for all processors using the shared region. It must be the worst case value SharedRegion.cacheLineSize = 128; IPC 3.30 74 SharedRegion Configuration Define SharedRegion #0

The shared region base and size are defined in the platform memory map. config.bld Build.platformTable["ti.platforms.evm6678:core0"] = { ... externalMemoryMap: [ ["SR_0", { name: "SR_0", space: "data", access: "RW", base: 0x84000000, len: 0x200000, comment: "SR#0 Memory (2 MB)" }], Reference the memory map from platform to configure SR_0 app.cfg var SR0Mem = Program.cpu.memoryMap["SR_0"]; SharedRegion.setEntryMeta(0, new SharedRegion.Entry({ name: "SR_0", base: SR0Mem.base, len: SR0Mem.len,

ownerProcId: 0, isValid: true, cacheEnable: true }) ); IPC 3.30 75 SharedRegion Configuration Cache setting for a shared region. Reports memory cache setting This config param does not control the cache behavior, it reflects the cache behavior. In other words, if the shared memory is eligible for caching, then this parameter must be set true. Controls IPC cache operations When set to true, IPC will perform the necessary cache operations. Processor relative

It may be different on each processor using the same shared region. This comes about because each processor defines its cache behavior. IPC 3.30 76 Build Configuration Build module used to configure library type. var Build = xdc.useModule('ti.sdo.ipc.Build'); Build.LibType = Build.LibType_NonInstrumented; Build.LibType Build.LibType_Instrumented Prebuild library supplied in IPC product. Optimized with logging and asserts enabled. Build.libType_NonInstrumented Prebuilt library supplied in IPC product. Optimized without instrumentation. Build.libType_Custom Rebuilds IPC libraries from source for each executable. Optimized by default. Use Build.customCCOpts to modify compiler options. Build.libType_Debug Rebuilds IPC libraries from source for each executable.

Non-optimized, useful for debugging IPC sources. IPC 3.30 77 Build Configuration Build module used to configure library type. var Build = xdc.useModule('ti.sdo.ipc.Build'); Build.LibType = Build.LibType_NonInstrumented; Build.LibType Build.LibType_Instrumented Prebuild library supplied in IPC product. Optimized with logging and asserts enabled. Build.libType_NonInstrumented Prebuilt library supplied in IPC product. Optimized without instrumentation. Build.libType_Custom Rebuilds IPC libraries from source for each executable. Optimized by default. Use Build.customCCOpts to modify compiler options. Build.libType_Debug Rebuilds IPC libraries from source for each executable. Non-optimized, useful for debugging IPC sources. Build.libType_PkgLib Links with package libraries in the IPC product. These

libraries to not ship with the product. You must rebuild the IPC product to generate the package libraries. Useful for development and sharing custom libraries. IPC 3.30 78 MessageQ Configuration Message Queue Name Length The maximum length of a message queue name is set at configuration time. var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ'); MessageQ.maxNameLen = 48; Number of message queue heaps The MessageQ module maintains a table of registered heap handles. The size of this table is set at configuration time. The heapId field in the message queue header is used to index into this table. The heapId must be system wide unique. For example, if ProcA and ProcB share a heap, it might be registered with heapId = 0. If ProcC and ProcD share a different

heap, their registered heapId cannot be 0. Keep this in mind when configuring the size of the heap table. MessageQ.numHeaps = 12; IPC 3.30 79 Notify Configuration Number of events supported by Notify By default, the Notify module will support the maximum number of possible events. You can reduce this to conserver on memory footprint. var Notify = xdc.useModule('ti.sdo.ipc.Notify'); Notify.numEvents = 16; Number of reserved events Use this config param to reserve events for middleware modules. IPC already reserves some number, so do not reduce this value. You can increase the value to reserve additional events for your middleware. Notify.reservedEvents = 8;

IPC 3.30 80 Notify Configuration Number of events supported by Notify By default, the Notify module will support the maximum number of possible events. You can reduce this to conserver on memory footprint. var Notify = xdc.useModule('ti.sdo.ipc.Notify'); Notify.numEvents = 16; IPC 3.30 81 GateMP Configuration Maximum Name Length The maximum name length for a GateMP instance is controlled by this config param. Although this is a module-wide config parameter, it is used

by the GateMP module when creating its private NameServer instance. var GateMP = xdc.useModule('ti.sdo.ipc.GateMP'); GateMP.maxNameLen = 48; Device-specific gate delegates offer hardware locking to GateMP GateHWSpinlock for OMAP4, OMAP5, TI81XX, Vayu GateHWSem for C6474, C66x GateAAMonitor for C6472 GatePeterson, GatePetersonN for devices that dont have HW locks IPC 3.30 82 GateMP Configuration GateMP has three proxies RemoteSystemProxy RemoteCustom1Proxy RemoteCustom2Proxy Each proxy is assigned a delegate module. The delegate is the one

which actually implements the gate. Typically, the system delegate will use hardware support if available and the custom delegates are software implementations. GateMP.RemoteSystemProxy = xdc.useModule('ti.sdo.ipc.gates.GateHWSpinlock'); GateMP.RemoteCustom1Proxy = xdc.useModule('ti.sdo.ipc.gates.GatePeterson'); GateMP.RemoteCustom2Proxy = xdc.useModule('ti.sdo.ipc.gates.GateMPSupportNull'); Note: GatePeterson works for only two clients. Use GatePetersonN for three or more clients. IPC 3.30 83 GateMP Configuration The hardware spinlocks are reused as GateMP instances are deleted and re-created. When creating a GateMP instance, the remoteProtect create parameter specifies which proxy to use.

#include GateMP_Params params; GateM_Handle gate; GateMP_Params_init(¶ms); params.name = "BufGate"; params.remoteProtect = GateMP_RemoteProtect_CUSTOM1; gate = GateMP_create(¶ms); IPC 3.30 84 GateMP Configuration On Vayu, GateHWSpinlock is the default remote system delegate. It has a config parameter for specifying the base address of the hardware spin locks. It does not have a default value because it is set internally based on the device. You can override the default by setting it in your config script. var GateHWSpinlock = xdc.useModule(ti.sdo.ipc.gates.GateHWSpinlock); GateHWSpinlock.baseAddr = 0x4A0F6800;

The number of hardware spinlocks to use is set by an internal config parameter (look at the xdc file to see this). This is also set internally based on the device. However, it is possible to override this in your config script. Warning: this is not a common practice. GateHWSpinlock.numLocks = 64; IPC 3.30 85 Agenda Overview IPC Modules Configuration SCALABILITY Optimization Footnotes IPC 3.30 86

Scalability IPC scalability allows you to include as little or as many modules as you need. Scalability allows you to manage the IPC footprint (data and code) contributed to your executable. Scalability options Utilities only Notify only IPC full IPC 3.30 87 Scalability Utilities only Application provides its own IPC framework. The utilities package provides foundational support. The application uses only the MultiProc module. Do not

use the Ipc module. var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); To use the NameServer module, application must provide an INameServerRemote impementation. (Advanced topic.) ti.sdo.utils.INameServerRemote IPC 3.30 88 Scalability Notify only At this scalability level, the Notify and MultiProc modules are the only IPC modules used by the application. Do not use the Ipc module. No calls to Ipc_start or Ipc_attach. Call Notify_attach per transport to enable notify. After this

call, the processor is able to receive notify events. If needed, the application is responsible to "handshake" between sender and listener. Only supported with notify mailbox driver. IPC 3.30 89 Scalability Notify only Notify only configuration var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); var Notify = xdc.useModule('ti.sdo.ipc.Notify'); Notify attach example #include #include Int procId; procId = MultiProc_getId("EVE1"); Notify_attach(procId, 0);

IPC 3.30 90 Scalability IPC full This is the default scalability level Must configure the following modules ti.sdo.ipc.Ipc ti.sdo.ipc.SharedRegion ti.sdo.utils.MultiProc Application is entitled to use all IPC modules. IPC 3.30 91 Lab ex13_notifypeer Please open the PowerPoint slide named IPC_Lab_3_Sclability

IPC 3.30 92 Agenda Overview IPC Modules Configuration Scalability OPTIMIZATION Footnotes IPC 3.30 93 IPC Optimization wiki page Through configuration parameters, IPC can be optimized for a given application. There is a good wiki topic on this. http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Optimizing_IPC_Applications

Using dedicated GateMP instances can reduce runtime contention. There are a few transports available. They have different restrictions and runtime performance. IPC 3.30 94 IPC Optimization heap + gate Heaps will use the default gate. When creating two independent heap instances, there would be unnecessary contention for the same gate. To reduce contention for this gate, use a dedicated GateMP instance for your heap. Create the GateMP instance Assign gate instance in heap create parameter Create the heap The dedicated gate is used automatically

IPC 3.30 95 IPC Optimization heap + gate When using the default gate, two independent heaps will contend for the same gate. SharedRegion IPU default: GateMP Application HeapMem_create DSP Application a: HeapBufMP

HeapMem_open b: HeapBufMP IPC 3.30 96 IPC Optimization heap + gate When using a dedicated gate for each heap, there is no contention for the gate (between the heaps). SharedRegion IPU Application HeapMem_create default: GateMP heapA: GateMP

heapB: GateMP a: HeapBufMP DSP Application HeapMem_open b: HeapBufMP IPC 3.30 97 IPC Optimization heap + gate This example creates a heap to be used by MessageQ. A dedicated GateMP instance is used for the heap. #include #include #include

HeapBufMP params; HeapBufMP_Params_init(¶ms); params.name = "HeapA"; params.blockSize = 128; params.numBlocks = 32; params.gate = GateMP_create(NULL); No need to specify a name for the gate. The default protection will be used. HeapBufMP_Handle heap; heap = HeapBufMP_create(params); MessageQ_registerHeap(0, heap); IPC 3.30 98 IPC Optimization message transport The MessageQ module uses a transport for actual message delivery.

There are three available transports, each with different runtime performance characteristics. TransportShm slowest, largest data footprint, most robust (default) TransportShmCirc medium, fixed length transport buffer TransportShmNotify fastest, may cause sender to busy wait Each transport has a corresponding setup module. To use a given transport, configure the MessageQ module with the transports setup module. TransportShmSetup the setup module TransportShmCircSetup the setup module TransportShmNotifySetup the setup module Message transport are in the following folder. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/transports All MessageQ modules must be configured to use the same transport. IPC 3.30

99 IPC Optimization message transport Example configuration var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ'); MessageQ.SetupTransportProxy = xdc.useModule('ti.sdo.ipc.transports.TransportShmNotifySetup'); IPC 3.30 100 IPC Optimization notify driver The Notify module uses a low-level driver to implement the actual signaling between processors. Each driver has a corresponding setup module. To use a given driver, configure the Notify module with the drivers setup module. Generic (i.e. software) notify drivers are in the following folder. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/notifyDrivers NotifyDriverShm (default)

NotifyDriverCirc Device specific (i.e. hardware) notify drivers are in the family folder. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/family ti81xx/NotifyDriverMbx vayu/NotifyDriverMbx All Notify modules must be configured to use the same driver. Notify driver list is constantly changing as we add new device support. IPC 3.30 101 IPC Optimization notify driver The setup modules are always device specific, even when using a generic driver. Look in the family folder to see which setup modules are available for your device. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/family

Here is an example for the C647x device. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/family/c647x NotifySetup.xdc (default) NotifyCircSetup.xdc Here is an example for ti81xx device. ipc_3_xx_pp_bb/packages/ti/sdo/ipc/family/ti81xx NotifySetup.xdc (default) NotifyCircSetup.xdc NotifyMbxSetup.xdc IPC 3.30 102 IPC Optimization notify driver Example configuration for C647x var Notify = xdc.useModule('ti.sdo.ipc.Notify'); Notify.SetupProxy = xdc.useModule('ti.sdo.ipc.family.c647x.NotifyMbxSetup'); IPC 3.30

103 IPC Optimization Vayu notify driver Vayu notify driver configuration is different! There is only one notify setup module for Vayu. ti.sdo.ipc.family.vayu.NotifySetup Available notify drivers on Vayu. ti.sdo.ipc.notifyDrivers.NotifyDriverShm (default) ti.sdo.ipc.family.vayu.NotifyDriverMbx Notify driver configuration is specified for each connection. IPC 3.30 104 IPC Optimization Vayu notify driver Example configuration for Vayu (on DSP1) var NotifySetup = xdc.useModule('ti.sdo.ipc.family.vayu.NotifySetup'); NotifySetup.connections.$add(

new NotifySetup.Connection({ procName: "EVE1", driver: NotifySetup.Driver_MAILBOX }) ); NotifySetup.connections.$add( new NotifySetup.Connection({ procName: DSP2", driver: NotifySetup.Driver_SHAREDMEMORY }) ); IPC 3.30 105 Agenda Overview IPC Modules Configuration Scalability Optimization

FOOTNOTES IPC 3.30 106 Footnotes Examples Examples are provided in the following location. ipc_3_xx_pp_bb/examples/ Examples are platform and OS-specific. Not all examples are provided for all environments. Makefile-based, demonstrating multicore-friendly build model Developed independent of specific SDKs, so memory maps dont always align. Use DRA7xx_bios_elf for Vayu platform DRA7xx = platform bios = host operating system (i.e. SYS/BIOS on all processors) elf = ELF tool chain

IPC 3.30 107 Footnotes Error Handling Many of the IPC APIs return an integer as a status code. All error values are negative; all success values are zero or positive. You can use a simple test to check for error. Int status; status = MessageQ_get(...); if (status < 0) { /* error */ } Some APIs return a handle. If the handle is NULL, an error has occurred. MessageQ_Handle queue; queue = MessageQ_create(...); if (queue == NULL) { /* error */ }

IPC status codes come in two groups: success and error. The S and E in the status code tells you if it is success or error. MessageQ_S_ALREADYSETUP MessageQ_E_NOTFOUND IPC 3.30 108 Footnotes Online Resources IPC Documentation IPC API Reference (Doxygen) latest release IPC Configuration Reference (Cdoc) latest release External wiki articles that will continue to evolve: Overview - http://processors.wiki.ti.com/index.php/IPC_3.x Users Guide - http://processors.wiki.ti.com/index.php/IPC_Users_Guide Migration - http://processors.wiki.ti.com/index.php/IPC_3.x_Migration_Guide Development Repo/products: Development Repository - http://git.ti.com/cgit/cgit.cgi/ipc/ipcdev.git/

Development Flow - http://git.ti.com/ipc/pages/Home Product download http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/ipc/index.html IPC 3.30 109 Thank You! IPC 3.30 110

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